跳至主導覽 跳至搜尋 跳過主要內容

Novel sidewall strained-Si channel nMOSFET

  • K. C. Liu*
  • , X. Wang
  • , E. Quinones
  • , X. Chen
  • , X. D. Chen
  • , D. Kencke
  • , B. Anantharam
  • , S. K. Ray
  • , S. K. Oswal
  • , S. K. Banerjee
  • *此作品的通信作者
  • University of Texas at Austin

研究成果: 會議稿件的類型論文同行評審

摘要

A sidewall tensile-strained Si nMOSFET that does not use a conventional relaxed SiGe buffer layer is presented. The key step is that approximately 120 angstroms Si cap layer is grown over the whole wafer to form tensile-strained Si on the sidewall of tetragonal SiGe, in which the lattice constant parallel to the sidewall of the pillar is stretched out and is larger than that of bulk Si. Electrical results show very good Id-Vg and Id-Vd characteristics. This vertical device shows less punchthrough effects in such a short channel and good on-off transistor characteristics.

原文英語
頁面180-181
頁數2
出版狀態已出版 - 1999
對外發佈
事件Proceedings of the 1999 57th Annual Device Research Conference Digest (DRC) - Santa Barbara, CA, USA
持續時間: 28 06 199930 06 1999

Conference

ConferenceProceedings of the 1999 57th Annual Device Research Conference Digest (DRC)
城市Santa Barbara, CA, USA
期間28/06/9930/06/99

指紋

深入研究「Novel sidewall strained-Si channel nMOSFET」主題。共同形成了獨特的指紋。

引用此