Novel VLSI architecture for a variable-length key, 64-bit BLOWFISH block cipher

Yeong Kang Lai*, Yu Chuan Shu

*此作品的通信作者

研究成果: 期刊稿件會議文章同行評審

4 引文 斯高帕斯(Scopus)

摘要

In this paper, a novel one-round VLSI architecture of the block cipher, BLOWFISH, for data encryption/decryption has been presented. Based on pipelined structure, efficient key management, and the mapping of the algorithm onto the datapath the performance of the architecture can be increased. In addition, all important standardized modes of operation of block ciphers, such as ECB, CBC, and OFB, are also supported. Due to the properties of low cost, high throughput rate, and scalable encryption, the VLSI block cipher provides efficient solutions for data encryption like wireless communication applications.

原文英語
頁(從 - 到)568-577
頁數10
期刊IEEE Workshop on Signal Processing Systems, SiPS: Design and Implementation
出版狀態已出版 - 1999
對外發佈
事件1999 IEEE Workshop on SiGNAL Processing Systems (SiPS 99): 'Design and Implementation' - Taipei, Taiwan
持續時間: 20 10 199922 10 1999

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