Predicting integrated circuit reliability from wafer fabrication technology reliability data

A reliability tool is developed to predict Integrated circuit reliability simply from the wafer fabrication or foundry technology reliability test data, considering the various failure mechanisms acting simultaneously during the operation of an IC. The reliability of an IC as a function of operation time can be obtained, and the mean time to failure as well as the medium time to failure can be predicted before the IC is fabricated. An example of the application of the tool to 6T SRAM is used for the demonstration. The distribution of the failure mechanisms in the SRAM cell at different operation time can also be determined. This distribution helps us to identify the probably root causes for the early failure of the SRAM so that reliability improvement effort can be focused and effective. It is also shown that the reliability of the SRAM of different memory size can be very different even the fabrication technology reliability and the cell design remain unchanged.