Reliability analysis of amorphous silicon thin-film transistors during accelerated ESD stress

Jung Ruey Tsai; Ting Ting Wen; Shao Ming Yang; Gene Sheu; Ruey Dar Chang; Yi Jhen Syu; Chin Ping Liu; Hsiu Fu Chang; Zhao Hui Wei

doi:10.1109/IPFA.2015.7224388

Reliability analysis of amorphous silicon thin-film transistors during accelerated ESD stress

Jung Ruey Tsai, Ting Ting Wen, Shao Ming Yang, Gene Sheu, Ruey Dar Chang, Yi Jhen Syu, Chin Ping Liu, Hsiu Fu Chang, Zhao Hui Wei

電子工程學系(含學碩博士班)

研究成果: 圖書/報告稿件的類型 › 會議稿件 › 同行評審

摘要

This work investigates the degradation of electrical characteristics of amorphous silicon thin-film transistors during the accelerated ESD stress with a 40V high voltage and a high/low current of 2 mA/0.1 μA conditions. Both the leakage current and the threshold voltage shift are severe as the accelerated ESD stress applied at the gate region. The 40V accelerated ESD stress with a high current has more severe impact on the electrical performance of device than that with a low current.

原文	英語
主出版物標題	Proceedings of the 22nd International Symposium on the Physical and Failure Analysis of Integrated Circuits, IPFA 2015
發行者	Institute of Electrical and Electronics Engineers Inc.
頁面	318-321
頁數	4
ISBN（電子）	9781479999286, 9781479999286
DOIs	https://doi.org/10.1109/IPFA.2015.7224388
出版狀態	已出版 - 25 08 2015
事件	22nd International Symposium on the Physical and Failure Analysis of Integrated Circuits, IPFA 2015 - Hsinchu, 台灣持續時間: 29 06 2015 → 02 07 2015

出版系列

名字	Proceedings of the International Symposium on the Physical and Failure Analysis of Integrated Circuits, IPFA
卷	2015-August

Conference

Conference	22nd International Symposium on the Physical and Failure Analysis of Integrated Circuits, IPFA 2015
國家/地區	台灣
城市	Hsinchu
期間	29/06/15 → 02/07/15

文獻附註

Publisher Copyright:
© 2015 IEEE.

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10.1109/IPFA.2015.7224388

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引用此

Tsai, J. R., Wen, T. T., Yang, S. M., Sheu, G., Chang, R. D., Syu, Y. J., Liu, C. P., Chang, H. F., & Wei, Z. H. (2015). Reliability analysis of amorphous silicon thin-film transistors during accelerated ESD stress. 於 Proceedings of the 22nd International Symposium on the Physical and Failure Analysis of Integrated Circuits, IPFA 2015 (頁 318-321). 文章 7224388 (Proceedings of the International Symposium on the Physical and Failure Analysis of Integrated Circuits, IPFA; 卷 2015-August). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/IPFA.2015.7224388

Tsai, Jung Ruey ; Wen, Ting Ting ; Yang, Shao Ming 等. / Reliability analysis of amorphous silicon thin-film transistors during accelerated ESD stress. Proceedings of the 22nd International Symposium on the Physical and Failure Analysis of Integrated Circuits, IPFA 2015. Institute of Electrical and Electronics Engineers Inc., 2015. 頁 318-321 (Proceedings of the International Symposium on the Physical and Failure Analysis of Integrated Circuits, IPFA).

@inproceedings{ff310f8c064043dc923d9baa3cdd0ff6,

title = "Reliability analysis of amorphous silicon thin-film transistors during accelerated ESD stress",

abstract = "This work investigates the degradation of electrical characteristics of amorphous silicon thin-film transistors during the accelerated ESD stress with a 40V high voltage and a high/low current of 2 mA/0.1 μA conditions. Both the leakage current and the threshold voltage shift are severe as the accelerated ESD stress applied at the gate region. The 40V accelerated ESD stress with a high current has more severe impact on the electrical performance of device than that with a low current.",

author = "Tsai, {Jung Ruey} and Wen, {Ting Ting} and Yang, {Shao Ming} and Gene Sheu and Chang, {Ruey Dar} and Syu, {Yi Jhen} and Liu, {Chin Ping} and Chang, {Hsiu Fu} and Wei, {Zhao Hui}",

note = "Publisher Copyright: {\textcopyright} 2015 IEEE.; 22nd International Symposium on the Physical and Failure Analysis of Integrated Circuits, IPFA 2015 ; Conference date: 29-06-2015 Through 02-07-2015",

year = "2015",

month = aug,

day = "25",

doi = "10.1109/IPFA.2015.7224388",

language = "英语",

series = "Proceedings of the International Symposium on the Physical and Failure Analysis of Integrated Circuits, IPFA",

publisher = "Institute of Electrical and Electronics Engineers Inc.",

pages = "318--321",

booktitle = "Proceedings of the 22nd International Symposium on the Physical and Failure Analysis of Integrated Circuits, IPFA 2015",

address = "美国",

}

Tsai, JR, Wen, TT, Yang, SM, Sheu, G, Chang, RD, Syu, YJ, Liu, CP, Chang, HF & Wei, ZH 2015, Reliability analysis of amorphous silicon thin-film transistors during accelerated ESD stress. 於 Proceedings of the 22nd International Symposium on the Physical and Failure Analysis of Integrated Circuits, IPFA 2015., 7224388, Proceedings of the International Symposium on the Physical and Failure Analysis of Integrated Circuits, IPFA, 卷 2015-August, Institute of Electrical and Electronics Engineers Inc., 頁 318-321, 22nd International Symposium on the Physical and Failure Analysis of Integrated Circuits, IPFA 2015, Hsinchu, 台灣, 29/06/15. https://doi.org/10.1109/IPFA.2015.7224388

Reliability analysis of amorphous silicon thin-film transistors during accelerated ESD stress. / Tsai, Jung Ruey; Wen, Ting Ting; Yang, Shao Ming 等.
Proceedings of the 22nd International Symposium on the Physical and Failure Analysis of Integrated Circuits, IPFA 2015. Institute of Electrical and Electronics Engineers Inc., 2015. p. 318-321 7224388 (Proceedings of the International Symposium on the Physical and Failure Analysis of Integrated Circuits, IPFA; 卷 2015-August).

研究成果: 圖書/報告稿件的類型 › 會議稿件 › 同行評審

TY - GEN

T1 - Reliability analysis of amorphous silicon thin-film transistors during accelerated ESD stress

AU - Tsai, Jung Ruey

AU - Wen, Ting Ting

AU - Yang, Shao Ming

AU - Sheu, Gene

AU - Chang, Ruey Dar

AU - Syu, Yi Jhen

AU - Liu, Chin Ping

AU - Chang, Hsiu Fu

AU - Wei, Zhao Hui

PY - 2015/8/25

Y1 - 2015/8/25

N2 - This work investigates the degradation of electrical characteristics of amorphous silicon thin-film transistors during the accelerated ESD stress with a 40V high voltage and a high/low current of 2 mA/0.1 μA conditions. Both the leakage current and the threshold voltage shift are severe as the accelerated ESD stress applied at the gate region. The 40V accelerated ESD stress with a high current has more severe impact on the electrical performance of device than that with a low current.

AB - This work investigates the degradation of electrical characteristics of amorphous silicon thin-film transistors during the accelerated ESD stress with a 40V high voltage and a high/low current of 2 mA/0.1 μA conditions. Both the leakage current and the threshold voltage shift are severe as the accelerated ESD stress applied at the gate region. The 40V accelerated ESD stress with a high current has more severe impact on the electrical performance of device than that with a low current.

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U2 - 10.1109/IPFA.2015.7224388

DO - 10.1109/IPFA.2015.7224388

M3 - 会议稿件

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T3 - Proceedings of the International Symposium on the Physical and Failure Analysis of Integrated Circuits, IPFA

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BT - Proceedings of the 22nd International Symposium on the Physical and Failure Analysis of Integrated Circuits, IPFA 2015

PB - Institute of Electrical and Electronics Engineers Inc.

T2 - 22nd International Symposium on the Physical and Failure Analysis of Integrated Circuits, IPFA 2015

Y2 - 29 June 2015 through 2 July 2015

ER -

Tsai JR, Wen TT, Yang SM, Sheu G, Chang RD, Syu YJ 等. Reliability analysis of amorphous silicon thin-film transistors during accelerated ESD stress. 於 Proceedings of the 22nd International Symposium on the Physical and Failure Analysis of Integrated Circuits, IPFA 2015. Institute of Electrical and Electronics Engineers Inc. 2015. p. 318-321. 7224388. (Proceedings of the International Symposium on the Physical and Failure Analysis of Integrated Circuits, IPFA). doi: 10.1109/IPFA.2015.7224388

Reliability analysis of amorphous silicon thin-film transistors during accelerated ESD stress

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