摘要
We suggest a new approach for designing a parallel implementation of the second-order Kaiman filter using systolic array processors. The original need of more than 27n3 computing times for sequential processing can be reduced to only 21n + 10r - 4 in the proposed parallel implementation. The improvement is gained from the utilizationof interarray pipelining, concurrent processing, and substitution forwarding techniques. The proposed approach is specially available for real-time application of the Kaiman filter in solving second-order linear system.
原文 | 英語 |
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頁(從 - 到) | 1128-1143 |
頁數 | 16 |
期刊 | IEEE Transactions on Aerospace and Electronic Systems |
卷 | 28 |
發行號 | 4 |
DOIs | |
出版狀態 | 已出版 - 10 1992 |
對外發佈 | 是 |