TY - JOUR
T1 - Thermally induced stress in partial SOI structure during high temperature processing
AU - Gan, Zhenghao
AU - Tan, Cher Ming
PY - 2004/2
Y1 - 2004/2
N2 - The thermally induced stresses in partial silicon-on-insulator (SOI) structures generated due to high temperature processing were simulated using finite element method in this work. By employing the Box-Behnken design for the response surface method, statistical models were established to relate the computational stresses to the structural geometric parameters, including oxide length (and width), oxide thickness and work layer thickness. With these statistical models, the geometrical parameters of the structure could be optimized to effectively reduce the thermally induced stresses in the partial SOI structures. In contrast to the full SOI wafer, withdrawal velocity is not the key parameter in determining the stress induced in the structure, but rather furnace temperature and structural parameters are the key parameters. It is found that thinner buried oxide is desired to reduce the stresses in the structure, and the length and width of the buried oxide should be above 60 μm for the induced stresses not to be excessive.
AB - The thermally induced stresses in partial silicon-on-insulator (SOI) structures generated due to high temperature processing were simulated using finite element method in this work. By employing the Box-Behnken design for the response surface method, statistical models were established to relate the computational stresses to the structural geometric parameters, including oxide length (and width), oxide thickness and work layer thickness. With these statistical models, the geometrical parameters of the structure could be optimized to effectively reduce the thermally induced stresses in the partial SOI structures. In contrast to the full SOI wafer, withdrawal velocity is not the key parameter in determining the stress induced in the structure, but rather furnace temperature and structural parameters are the key parameters. It is found that thinner buried oxide is desired to reduce the stresses in the structure, and the length and width of the buried oxide should be above 60 μm for the induced stresses not to be excessive.
KW - Finite element method
KW - Partial SOI
KW - Response surface method
KW - Thermal stress
UR - http://www.scopus.com/inward/record.url?scp=0347024240&partnerID=8YFLogxK
U2 - 10.1016/j.mee.2003.10.004
DO - 10.1016/j.mee.2003.10.004
M3 - 文章
AN - SCOPUS:0347024240
SN - 0167-9317
VL - 71
SP - 150
EP - 162
JO - Microelectronic Engineering
JF - Microelectronic Engineering
IS - 2
ER -