VLSI circuit design with built-in reliability using simulation techniques

Wen Jay Hsu*, Sudhir M. Gowda, Bing J. Sheu

*此作品的通信作者

研究成果: 期刊稿件會議文章同行評審

2 引文 斯高帕斯(Scopus)

摘要

The use of reliability assurance and enhancement of integrated circuits in the design of high-performance electronic systems is discussed. Circuit simulators with embedded degradation models can be utilized to accurately predict VLSI reliability due to hot-carrier effects and electromigration. Basic design methods for constructing digital and analog circuit blocks with adequate built-in reliability are presented. Lifetime for DRAM circuitries and operational amplifiers can be significantly increased through these novel simulation techniques. Several practical VLSI design examples using an integrated-circuit reliability simulator are discussed.

原文英語
期刊Proceedings of the Custom Integrated Circuits Conference
出版狀態已出版 - 1990
對外發佈
事件Proceedings of the 12th Annual IEEE 1990 Custom Integrated Circuits Conference - CICC '90 - Boston, MA, USA
持續時間: 13 05 199016 05 1990

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